suppose we have a processor with the following parameters:
–base cpi=1.0, if hit in the l1 cache. L1 cache miss rate is 2%. Clock rate is 5 ghz. Memory access time is 100 ns, including all the miss handling.
كود:
–miss penalty to main memory is 100ns/0.2 = 500 clock cycles.
–total cpi = 1.0 + 2%×500 = 11.0
if we add a l2 cache that has 5 ns access time. L2 global miss rate = 0.5%
كود:
–miss penalty to l2 is 5ns/0.2 = 25 clock cycles
–total cpi = 1.0+ 2%×25 + 0.5%×500 = 4.0