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[alrooh]

1. An instruction is being executed on a MIPS single-cycle datapath processor. Probing
(inquiring) the different control lines shows the following combination:
PCSrc = 0, Regdst = 1, ALUSrc = 0, MemtoReg = 0, ALUOp = 10, and RegWrite
signal is asserted.
a. What class of instruction is being executed on the processor?
b. Can you specify which instruction is executing?
c. If the answer to (b) is yes, what instruction? If no, why?.
2. Describe the effect that a single stuck-at-0 fault (i.e. regardless of what it should be,
the signal is always 0) would have for the signals shown below, in the single-cycle
datapath. Which instructions, if any, will not work correctly? Explain why.
Consider each of the following faults separately.
a. RegWrite = 0
b. ALUOp0 = 0
c. Memread = 0
3. We wish to add the instruction jr (jump register) to the single-cycle datapath. Add
any necessary datapaths and control signals to the single-data path of the figure
shown in the previous question. You can print and use the figure to make it faster to
show the additions.
4. Repeat Exercise 3, but use the multi-cycle datapath. Discuss the advantages of using
this design in the implementation.
5. Illustrate by drawing the execution of: and instruction, using the single-cycle
datapath. Mention all the control signals, and control lines for the multiplexors
needed during the execution and their logic values.